Innovation & Tech

AMD, Cornelis Expand HPC Partnership as GWDG Deploys EMMY P4

About 300 AMD EPYC 9745 nodes power GWDG’s EMMY P4 as AMD and Cornelis expand joint testing, production deployment and a 200G networking roadmap for research systems.

By Nathan Brooks

5 min read

AMD and Cornelis Expand HPC Partnership as GWDG Deploys EMMY P4
AMD and Cornelis Expand HPC Partnership as GWDG Deploys EMMY P4blickpixel / pixabay

What's News

  • GWDG’s EMMY P4 combines approximately 300 dual-socket AMD EPYC 9745 nodes with Cornelis CN5000 networking.
  • The initial 252-node group has 768 GiB of DDR5 memory and 3.8 TiB of local NVMe storage per node on 200G links.
  • Cornelis reports 20% higher average throughput for 132 CONVERGE CFD workloads on four nodes versus NVIDIA NDR InfiniBand.
  • CN5000 has production qualification across more than 25 AMD EPYC 9005 platform configurations and AMD Instinct MI350X Series accelerators.
  • OEM systems combining CN6000 and AMD EPYC 9006 processors are expected in the first quarter of 2027.

By Nathan Brooks

GWDG’s EMMY P4 supercomputer in Göttingen combines approximately 300 dual-socket AMD EPYC 9745 nodes with Cornelis CN5000 Omni-Path networking, according to AMD and Cornelis. The deployment shows how the two companies are pairing AMD processors and accelerators with Cornelis interconnects to move larger scientific workloads into production.

What does the partnership change for research buyers?

AMD and Cornelis are establishing a joint go-to-market program spanning system design, application benchmarking, validation, acceptance testing and production deployment. The program works through existing manufacturers and system integrators.

The program lets customers test their own applications at AMD’s HPC Center of Excellence in Munich before committing to a configuration. That gives research buyers workload-specific evidence rather than treating processor specifications or network bandwidth as sufficient proof of performance.

Why networking now sets the compute pace

In the companies’ architecture, Cornelis supplies the interconnect fabric connecting servers, while AMD supplies the compute. Their expanded program validates the two together against applications, reflecting the companies’ view that bandwidth and processor specifications alone do not establish system performance.

AMD and Cornelis say buying more processors does not guarantee proportionally faster research unless applications can move data quickly enough to keep them working. That turns communication efficiency into a system-level purchasing criterion, not an afterthought.

AMD and Cornelis say scientific simulations often divide one large problem across many servers, with each server calculating part of the result and exchanging information with the others. Computational fluid dynamics, for example, requires neighboring regions of a simulated flow to share updated conditions as the calculation progresses.

AMD and Cornelis describe Message Passing Interface, or MPI, as a widely used software interface for coordinating distributed work. They say latency, message-handling capacity and congestion can leave a fast processor idle while it waits for another node’s data. That makes communication efficiency a system-level concern.

“Each new EPYC generation increases the number of cores needing access to the network,” Lisa Spelman, CEO of Cornelis, said. She said added compute can leave expensive resources waiting when communication cannot keep pace, making workload-specific validation essential.

What EMMY P4 adds

GWDG, the scientific computing organization in Göttingen, supports NHR@Göttingen, one of Germany’s nine national high-performance computing centers. Its users run applications in life sciences, physics, quantum research, AI and the humanities. Cornelis says the broader environment handles approximately 3.5 million HPC jobs annually.

AMD’s EPYC 9745 specifications list 128 physical cores per processor, putting 256 cores in each dual-socket node. AMD and Cornelis say keeping that many cores productive across hundreds of nodes makes communication efficiency a system-level concern.

GWDG’s installation documentation lists an initial group of 252 nodes, each with 768 GiB of DDR5 memory and 3.8 TiB of local NVMe storage. CN5000 adapters connect them through 200G links. AMD and Cornelis describe the larger EMMY P4 deployment as approximately 300 nodes.

AMD and Cornelis say EMMY P4 demonstrates EPYC and Cornelis networking in a scientific computing environment. The AMD and Cornelis announcement does not say the CPU nodes contain AMD Instinct accelerators, so the deployment does not establish the partnership’s GPU work.

What the benchmarks do—and do not—show

Cornelis says CN5000 is qualified for production with AMD EPYC 9005 processors across more than 25 validated platform configurations in North America and Europe. Cornelis also extended CN5000 qualification to AMD Instinct MI350X Series accelerators.

Cornelis says application testing can reveal whether an architecture fits the work already running in an organization. A large simulation with frequent synchronization can behave differently from AI work that spends more time inside accelerator kernels. Memory capacity, software libraries, node configuration and network behavior all influence the result.

A selected set of 132 CONVERGE computational fluid dynamics workloads achieved 20% higher average throughput on four nodes than a comparison using NVIDIA NDR InfiniBand, Cornelis reported. The company also reported nearly ninefold scaling from one to eight nodes for a STAR-CCM+ workload running on AMD EPYC 9755 processors.

Cornelis’s figures are vendor-reported results from particular test configurations. The company’s technical white papers document the conditions, and the figures do not establish the same advantage for every code or cluster. AMD’s Munich testing program lets buyers test their own workloads against that backdrop.

The next hardware test

Cornelis positions the upcoming CN6000 around an 800G adapter and a PCIe 6.0 x16 interface. OEM systems combining CN6000 and AMD EPYC 9006 processors are expected in the first quarter of 2027. The product remains a roadmap item, separate from the deployed CN5000-based EMMY P4 infrastructure.

AMD’s accelerator strategy also includes the ROCm software stack, which provides tools and libraries for GPU computing. AMD says scientific AI requires applications, mathematical libraries and communication software to work with the processors and network.

The expanded partnership between AMD and Cornelis covers traditional scientific computing, which places substantial emphasis on double-precision, or FP64, arithmetic. That differs from the lower-precision calculations used in many AI workloads, making platform suitability broader than headline AI performance.

For research centers, the next proof point comes in the first quarter of 2027, when OEMs are expected to combine CN6000 with AMD EPYC 9006 processors. GWDG provides the current production reference, while the MI350X qualification and future accelerator support broaden potential use cases.

The practical measure remains useful work completed, not processor count. Buyers still need to validate their own workloads before claiming Cornelis’s reported gains.

Source: unite.ai

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Nathan Brooks

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News editor covering regulation, policy and their impact on entrepreneurship, startups and venture funding at Business Bearings.

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